Data loss issue in FTDI FT232H and FT2232H Sync 245 FIFO Mode (Clock Control)

I analyzed the Sync FIFO Mode data loss that FT device was going well but data loss caused.
As below figure, the couter or FIFO is controled by FT device and data transpose to PC.

FT232H & Counter(FIFO)

When #TXE is Low, data intake to FT device. And data does not intake when #TXE is High. But FT device clock is always generating.
Then We have to prevent clock to not work Counter(or FIFO) using CONTROL block between #TXE is High.

Clock Control logic

But the timing relation between #TXE and CLK as below,

CLK & #TXE timing

The timing in #TXE became Low, CLKout signal has short pulse, and the counter(FIFO) increment one step. And one data can not read.

data loss timing

Therfore one data was lost ( Remark in this mode, FT232H or FT2232H pick-up data at rising edge of CLKin).
Then CONTROL Block change as below,

Clock Control logic 2

Counter(FIFO) control signal changes as below,

correct timing

we can get lossless data.